Figure 1-11 Target Interface Logic Levels - ARM DSTREAM-PT Reference Manual

System and interface design
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The input and output characteristics of the DSTREAM-PT system are compatible with logic levels from
TTL-compatible, or CMOS logic in target systems.
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1 Debug and trace interface
1.7 Target Voltage Reference (VTREF) signals
3.0
2.0
Voh/Vin(th) (V)
1.0
0.0
0.0
1.0
VTREF (V)

Figure 1-11 Target interface logic levels

Voh
Vin(th)
2.0
3.0
4.0
1-27

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