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Figure 4-11.
<R>
Notes 1. This connection is designed assuming that the RESET signal is output from the N-ch open-drain buffer
(output resistance: 100 Ω or less).
2. For debugging, mount no clock circuit.
3. The clock signal provided on the 78K0-OCD board or a 4, 8, or 16 MHz clock signal generated in
MINICUBE2 can be used for the clock signal of the target device during on-chip debugging.
4. The circuit enclosed by a dashed line is designed for flash self programming, which controls the FLMD0 pin
via ports.
Connect any port that can output data to FLMD0 via a resistor.
When not using flash self programming, process the pins according to the device specifications.
5. The name of the pin shared with OCD1A (OCD1B) might be invalid or might not exist depending on the
device.
6. This is the processing for the pins that are unused (the inputs are left open) when the target device
operates (when MINICUBE2 is not connected).
When changing the resistance, refer to APPENDIX A EQUIVALENT CIRCUIT and make sure that the
change does not affect operation before using the device.
CHAPTER
4
HOW TO USE MINICUBE2 WITH 78K0 MICROCONTROLLER
When Only Debugging Is Performed (with OCD0A/OCD0B communication)
V
DD
Target connector
1
Note 1
RESET_IN
2
RESET_OUT
3
FLMD0
4
V
DD
5
DATA
6
GND
7
Note 3
CLK
8
GND
9
R.F.U.
10
R.F.U.
(This circuit is used to control the port during flash programming.)
For details, refer to the user's manual for the target device.
User's Manual
V
DD
1kΩ
10kΩ
Note 2
10kΩ
1k to
Note 6
10kΩ
For details, refer to 4.1.3
For flash programming, mount a clock circuit.
U18371EJ5V0UM
V
DD
Reset connector
RESET signal
Target device
_RESET
FLMD0
V
DD
OCD0B(X2)
OCD0A(X1)
1kΩ
Port X
Note 4
Note 5
OCD1A
GND
Connection of reset pin.
65
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