Renesas QB-MINI2 User Manual page 60

On-chip debug emulator with programming function
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<R>
(Not communicating by using the OCD0A and OCD0B pins or not using the X1 oscillator)
Target connector
RESET_OUT
RESET_IN
Notes 1. Connect TxD (transmit side) of the target device to RxD (receive side) of the target connector, and TxD
(transmit side) of the target connector to RxD (receive side) of the target device.
2. Circuits other than the X1 oscillator can be used to generate the clock signal for the target device during
on-chip debugging.
Only a 4, 8, or 16 MHz clock signal generated in MINICUBE2 can be used during flash programming.
3. Short 1 to 3 and 2 to 4 of JP1 during on-chip debugging.
Short 1 to 2 of JP1 and leave 3 to 4 of JP1 open during flash programming.
Leave JP1 open when using the target device (when MINICUBE2 is not connected).
4. The name of the pin shared with OCD1A might be invalid or might not exist depending on the device.
For details, refer to the user's manual for the target device.
5. This connection is designed assuming that the RESET signal is output from the N-ch open-drain buffer
(output resistance: 100Ω or less).
6. The circuit enclosed by a dashed line is designed for flash self programming, which controls the FLMD0 pin
via ports.
Connect any port that can output data to FLMD0 via a resistor.
When not using flash self programming, process the pins according to the device specifications.
7. This is the processing for the pins that are unused (the inputs are left open) when the target device
operates (when MINICUBE2 is not connected).
When changing the resistance, refer to APPENDIX A EQUIVALENT CIRCUIT and make sure that the
change does not affect operation before using the device.
58
CHAPTER
4
HOW TO USE MINICUBE2 WITH 78K0 MICROCONTROLLER
Figure 4-4.
When Both Debugging and Programming Are Performed
1
GND
2
3
Note 1
RxD
V
DD
4
V
DD
5
Note 1
TxD
6
R.F.U.
7
10 kΩ
R.F.U.
8
8
8
R.F.U.
9
Note 2
CLK
10
R.F.U.
11
R.F.U.
12
R.F.U.
13
DATA
14
FLMD0
15
Note 5
16
R.F.U.
1 kΩ
User's Manual
V
DD
Note 7
3 k to kΩ
Note 7
1 k to kΩ
Note 3
JP1
3
1
1 k to
10 kΩ
2
4
V
10 kΩ
1 kΩ
DD
Note 5
Note 6
For details, refer to 4.1.3
Connection of reset pin.
U18371EJ5V0UM
V
DD
Target device
V
DD
RESET
TxD
RxD
OCD0A(X1)
1k to
Note 4
OCD1A
10 kΩ
OCD0B (X2)
FLMD0
Port X
GND
Reset connector
RESET

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