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20.1.2 Standby function control register
A wait time after the STOP mode is cleared upon interrupt request till the oscillation stabilizes is controlled with
the oscillation stabilization time select register (OSTS).
OSTS is set with an 8-bit memory manipulation instruction.
RESET input sets OSTS to 04H. Therefore, when the STOP mode is cleared with RESET input, the time till it
18
is cleared is 2
Symbol
7
OSTS
0
Caution
The wait time after the STOP mode is cleared does not include the time from STOP mode clear to
clock oscillation start (see "a" below), regardless of clearance by RESET input or by interrupt
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request generation.
Remarks 1. f
X
2. Values in parentheses apply to operation with f
484
CHAPTER 20 STANDBY FUNCTION
/f
.
X
Figure 20-1. Oscillation Stabilization Time Select Register Format
6
5
4
3
0
0
0
0
X1 Pin
Voltage Waveform
V
SS
: Main system clock oscillation frequency
2
1
0
Address
OSTS2 OSTS1 OSTS0
FFFAH
OSTS2 OSTS1 OSTS0 Oscillation Stabilization
0
0
0
0
1
Other than above
STOP Mode Clear
a
= 10.0 MHz
X
When Reset
R/W
04H
R/W
Time Selection
(819 µ s)
13
0
0
2
/f
X
0
1
2
15
/f
(3.28 ms)
X
16
1
0
2
/f
(6.55 ms)
X
1
1
2
17
/f
(13.1 ms)
X
0
0
2
18
/f
(26.2 ms)
X
Setting prohibited
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