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6.2.6 Port 4
Port 4 is an 8-bit input/output port with output latch. P40 to P47 pins can be set to the input mode/output mode
in 8-bit units with the memory expansion mode register (MM). When P40 to P47 pins are used as input ports, a pull-
up resistor can be connected to them in 8-bit units with an on-chip pull-up resistor option register (PUO).
Test input flag (KRIF) is set to 1 by falling edge detection.
Alternate functions include address/data bus in external memory expansion mode.
RESET input sets port 4 to input mode.
Figure 6-11 shows a block diagram of port 4. Figure 6-12 shows a block diagram of the falling edge detector.
WR
PUO
RD
WR
PORT
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WR
MM
PUO : Pull-up resistor option register
MM : Memory expansion mode register
RD
WR : Port 4 write signal
P40
P41
P42
P43
P44
P45
P46
P47
KRIF
KRMK : Test mask flag
142
CHAPTER 6 PORT FUNCTIONS
Figure 6-11. P40 to P47 Block Diagrams
PUO4
Output Latch
(P40 to P47)
MM
: Port 4 read signal
Figure 6-12. Block Diagram of Falling Edge Detector
: Test input flag
Selector
Falling Edge Detector
KRMK
V
DD
P-ch
P40/AD0 to
P47/AD7
KRIF set signal
standby release signal
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