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12.2 Clock Output Control Circuit Configuration
The clock output control circuit consists of the following hardware.
3
f
/2
X
f
/2
4
X
f
/2
5
X
f
/2
6
X
7
f
/2
X
8
f
/2
X
f
XT
CLOE TCL03 TCL02 TCL01 TCL00
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12.3 Clock Output Function Control Registers
The following two types of registers are used to control the clock output function.
• Timer clock select register 0 (TCL0)
• Port mode register 3 (PM3)
(1) Timer clock select register 0 (TCL0)
This register sets PCL output clock.
TCL0 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TCL0 to 00H.
Remark
Besides setting PCL output clock, TCL0 sets the 16-bit timer register count clock.
240
CHAPTER 12 CLOCK OUTPUT CONTROL CIRCUIT
Table 12-1. Clock Output Control Circuit Configuration
Item
Control register
Timer clock select register 0 (TCL0)
Port mode register 3 (PM3)
Figure 12-2. Clock Output Control Circuit Block Diagram
Synchroniz-
ing Circuit
4
Timer Clock Select Register 0
Internal Bus
Configuration
P35 Output
Latch
PCL/P35
PM35
Port Mode Register 3
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