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15.1.2 Register controlling standby function
A wait time after the STOP mode is released upon interrupt request until the oscillation stabilizes is controlled with
the oscillation stabilization time select register (OSTS).
OSTS is set with an 8-bit memory manipulation instruction.
Reset input sets OSTS to 04H.
Figure 15-1. Format of Oscillation Stabilization Time Select Register (OSTS)
Symbol
7
6
5
OSTS
0
0
0
Remark f
: System clock oscillation frequency
X
( ): f
= 4.5 MHz
X
Caution The wait time when the STOP mode is released does not include the time required for the clock
oscillation to start after the STOP mode has been released (see "a" in the figure below),
regardless of whether the mode has been released by the RESET signal or an interrupt request.
204
CHAPTER 15 STANDBY FUNCTION
4
3
2
0
1
0
0
OSTS2
OSTS1
OSTS0
STOP mode release
X1 pin
voltage
waveform
User's Manual U15104EJ2V0UD
Address
After reset
FFFAH
04H
Selection of oscillation stabilization
OSTS2
OSTS1
OSTS0
time when STOP mode is released
12
0
0
0
2
/f
(910 s)
X
14
0
0
1
2
/f
(3.64 ms)
X
15
0
1
0
2
/f
(7.28 ms)
X
16
0
1
1
2
/f
(14.6 ms)
X
17
1
0
0
2
/f
(29.1 ms)
X
Other than above
Setting prohibited
a
R/W
R/W
µ
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