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Symbol
<7>
CSIM0 CSIE0
R/W
CSIM01 CSIM00 Serial Interface Channel 0 Clock Selection
0
1
1
R/W
CSIM CSIM CSIM PM25 P25 PM26 P26 PM27 P27
04
03
×
0
1
0
1
1
R/W
WUP
0
1
R/W
CSIE0
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0
1
Notes
1. Bit 6 (COI) is a Read-Only bit.
2. Can be used as P25 (CMOS input) when used only for transmission.
3. Be sure to set WUP to 0 when the 3-wire serial I/O mode is selected.
×
Remark
PM××: Port mode register
P×× : Output latch of port
340
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( µ PD78014Y Subseries)
<6>
<5>
4
3
COI
WUP CSIM04 CSIM03 CSIM02 CSIM01 CSIM00
×
Input clock to SCK0 pin from off-chip
0
8-bit timer register 2 (TM2) output
1
Clock specified with bits 0 to 3 of timer clock select register 3 (TCL3)
02
×
0
1
0
0
0
1
SBI mode (Refer to 16.4.3 SBI mode operation)
2-wire serial I/O mode (Refer to 16.4.4 2-wire serial I/O mode operation)
2
or I
C bus mode (Refer to 16.4.5 I
Note 3
Wake-up Function Control
Interrupt request signal generation with each serial transfer in any mode
Interrupt request signal generation when the address received after bus release (when CMDD = RELD = 1
in the SBI mode or CMDD = 1 in the I
the SBI or I
2
C bus mode is used.
Serial Interface Channel 0 Operation Control
Operation stopped
Operation enable
: don't care
2
1
0
Address
FF60H
Operating
Start Bit
Mode
1
3-wire
MSB
serial I/O
LSB
mode
2
C bus mode operation)
2
C bus mode) matches the slave address register data (SVA) when
When Reset
R/W
00H
R/W
Note 1
SI0/SB0/SDA0/
SO0/SB1/SDA1/
P25 Pin Function
P26 Pin Function
SI0
Note 2
SO0
(Input)
(CMOS
output)
SCK0/SCL/
P27 Pin Function
SCK0
(CMOS
input/output)
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