Table of Contents
Advertisement
0
0
f
/2
X
f
/2
2
X
16-bit timer register
3
f
/2
X
lower 8 bits (TM0L)
TI0/P00/
Note 1
INTP0
3
0
TCL06 TCL05 TCL04
Timer clock
select
register 0
Notes 1. Edge detector
2. The configuration of the 16-bit timer/event counter output control circuit is shown in Figure 8-3.
Figure 8-1. 16-Bit Timer/Event Counter (Timer Mode) Block Diagram
Internal bus
15
16-bit compare register (CR00)
Match
Match
7
8
15
16-bit timer register
upper 8 bits (TM0H)
Clear
Clear
15
16-bit capture register (CR01)
Internal bus
OVF
Selector
3
TMC03 TMC02 TMC01 OVF0
16-bit timer mode
control register
INTTM0
Note 2
16-bit timer/event
counter output
TO0/P30
control circuit
3
2
INTP0
LVS0 LVR0 TOC01 TOE0
16-bit timer output
control register
Advertisement
Table of Contents
