Table of Contents
Advertisement
R/W
SVAM
R/W
R
Notes
Remark
www.DataSheet4U.com
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( µ PD78014Y Subseries)
Figure 16-8. Interrupt Timing Specification Register Format (2/2)
SVA Bit to be Used as Slave Address
0
Bits 0 to 7
1
Bits 1 to 7
SIC
INTCSI0 Interrupt Cause Selection
0
CSIIF0 is set to 1 upon termination of serial interface channel 0 transfer
1
CSIIF0 is set to 1 upon stop condition detection in the I
SBI mode
CLD
SCK0/SCL/P27 Pin Level
0
Low level
1
High level
1. When using wake-up function, set SIC to 0.
2. When CSIE0 = 0, CLD becomes 0.
SVA
: Slave address register
CSIIF0 : Interrupt request flag supports the INTCSI0
CSIE0 : Bit 7 of the serial operating mode register 0 (CSIM0)
Note 1
2
C bus mode or termination of serial interface in the
Note 2
337
Advertisement
Table of Contents
