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Caution
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( µ PD78014Y Subseries)
Figure 16-12. Example of Serial Bus Configuration with SBI
SCK0
Master CPU
SB0 (SB1)
When replacing the master CPU/slave CPU, a pull-up resistor is necessary for the serial clock line
(SCK0) as well because serial clock line (SCK0) input/output switching is carried out asynchronously
between the master and slave CPUs.
V
DD
Serial Clock
Serial Data Bus
SCK0
Slave CPU
SB0 (SB1)
Address 1
SCK0
Slave CPU
SB0 (SB1)
Address 2
SCK0
Slave IC
SB0 (SB1)
Address N
345
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