Table of Contents
Advertisement
(b) µ PD703008, 703008Y
MODE2
MODE1
0
0
0
0
0
1
0
1
Other than above
(c) µ PD70F3008, 70F3008Y
MODE2
MODE1
0
0
0
0
0
1
0
1
1
1
Other than above
(20) RESET (Reset) ... input
The RESET signal is an asynchronous input signal. A valid low-level signal on the RESET pin initiates a system
reset, regardless of the clock operation. In addition to normal system initialization/start functions, the RESET
signal is also used for exiting processor power save modes (HALT, IDLE, or STOP).
(21) X1, X2 (Crystal) ... input
An oscillator for internal system clock generation is connected across these pins.
An external clock source can also be referenced by connecting the external clock input to the X1 pin and leaving
the X2 pin open.
(22) CV
(Power Supply for Clock Generator)
DD
This pin supplies positive power to the clock generator.
(23) CV
(Ground for Clock Generator)
SS
This is the ground pin of the clock generator.
(24) V
(Power Supply)
DD
This pin supplies positive power. Connect all the V
(25) V
(Ground)
SS
This is a ground pin. Connect all the V
(26) AV
(Analog V
)
DD
DD
Analog power supply pin for A/D converter.
(27) AV
(Analog V
)
SS
SS
Ground pin for A/D converter.
CHAPTER 2 PIN FUNCTIONS
MODE0
0
Normal operation
mode
1
0
1
Setting prohibited
MODE0
0
Normal operation
mode
1
0
1
1
Flash memory programming mode
Setting prohibited
pins to a positive power supply.
DD
pins to ground.
SS
User's Manual U11969EJ3V0UM00
Operation Mode
ROM-less mode 1
ROM-less mode 2
Single-chip mode 1
Single-chip mode 2
Operation Mode
ROM-less mode 1
ROM-less mode 2
Single-chip mode 1
Single-chip mode 2
45
Advertisement
Table of Contents
