NEC V854 UPD703006 User Manual page 217

(c) Transmission interrupt request
When one frame of data or character has been completely transferred, a transmission completion interrupt
request (INTST) occurs.
Unless the data to be transmitted next is written to the TXS or TXSL registers, the transmission is aborted.
The communication rate drops unless the next transmit data is written to the TXS or TXSL registers
immediately after transmission has been completed.
Cautions 1. Generally, the transmission completion interrupt (INTST) is generated when the
transmit shift register (TXS or TXSL) is empty. However, by RESET input, the
transmission completion interrupt (INTST) is not generated when the transmit shift
register (TXS or TXSL) is empty.
2. During the transmit operation, writing data into the TXS or TXSL register is ignored
(the data is discarded) until INTST is generated.
Figure 8-3. Asynchronous Serial Interface Transmission Completion Interrupt Timing
(a) Stop bit length: 1
TXD (output)
INTST interrupt
(b) Stop bit length: 2
TXD (output)
INTST interrupt
CHAPTER 8 SERIAL INTERFACE FUNCTION
D0 D1 D2
Start
D0 D1 D2
Start
User's Manual U11969EJ3V0UM00
Stop
Parity/
D6 D7
extend
Parity/
Stop
D6 D7
extend
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