NEC V854 UPD703006 User Manual page 148

32/16-bit single-chip microcontroller hardware
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(2) Releasing software STOP mode
The STOP mode is released by the NMI signal input or RESET signal input.
It is necessary to ensure the oscillation stabilization time when releasing from the STOP mode in the PLL mode
(CKSEL bit = "0") and oscillator connection mode (CESEL bit = "0").
Moreover, the lock up time of the PLL may also be necessary, depending on the application. For details, refer
to section 6.4 PLL Lock-up.
(a) Releasing by NMI signal input
When the STOP mode is released by the NMI signal, the NMI request is also accepted.
If the STOP mode is set in an NMI processing routine, however, only the STOP mode is released, and
the interrupt is not accepted. The interrupt request is retained and kept pending.
NMI interrupt processing on releasing STOP mode
The interrupt processing that is started by the NMI signal input when the STOP mode is released is treated
in the same manner as a normal NMI interrupt that is processed (because there is only one handler address
of the NMI interrupt). Therefore, if it is necessary to distinguish between the two types of NMI interrupts,
a software flag should be defined in advance, and the flag must be set before setting the STOP flag by
the store/bit manipulation instruction. By checking this flag during the NMI interrupt processing, the NMI
used to released the STOP mode can be distinguished from the normal NMI.
(b) Releasing by RESET signal input
The operation same as the normal reset operation is performed.
148
CHAPTER 6 CLOCK GENERATOR FUNCTION
User's Manual U11969EJ3V0UM00

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