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Figure 8-27. Example of Master→ Slave Communication
Processing of
master device
IIC
ACKD
STD
SPD
H
WTIM
ACKE
H
STT
SPT
WREL
INTIIC
MSTS
TRC
H
Transfer line
SCL
SDA
Start
Processing of
condition
slave device
IIC
ACKD
STD
SPD
WTIM
H
ACKE
H
STT
SPT
WREL
INTIIC
L
MSTS
L
TRC
Note Perform wait release of a slave with either IIC ← FFH or WREL ← 1.
280
CHAPTER 8 SERIAL INTERFACE FUNCTION
(9-clock wait is selected both for master and slave) (1/3)
(1) Start condition-address
IIC ← Address
Transmission
1
2
3
4
5
6
A6 A5 A4 A3 A2 A1 A0
(When EXC = 1)
Reception
User's Manual U11969EJ3V0UM00
IIC ← Data
7
8
9
W ACK
1
2
3
4
D7
D6 D5 D4
IIC ← FFH
Note
Note
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