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SHLR (SHift Logical Right)
<Operation>
Rd (shifted logical right ) → Rd
<Assembly-Language Format>
SHLR Rd
<Examples>
SHLR R3L
<Operand Size>
Byte
<Description>
This instruction shifts an 8-bit general register one bit to the right. The most significant bit is
cleared to 0. The least significant bit shifts into the carry flag.
The operation is shown schematically below.
MSB
0
Bit 7
<Instruction Formats>
Addressing
mode
Register direct
LSB
Bit 0
Mnem.
Operands
SHLR
Rd
<Condition Code>
I
— — — —
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to "1" if the result is negative;
otherwise cleared to "0."
Z: Set to "1" if the result is zero; otherwise
cleared to "0."
V: Cleared to "0."
C: Receives the previous value in bit 0.
C
Instruction code
1st byte
2nd byte
1
1
0
rd
107
H
N
Z
3rd byte
4th byte
SHLR
V
C
0
No. of
states
2
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