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SHLL (SHift Logical Left)
<Operation>
Rd (shifted logical left ) → Rd
<Assembly-Language Format>
SHLL Rd
<Examples>
SHLL R2L
<Operand Size>
Byte
<Description>
This instruction shifts an 8-bit general register one bit to the left. The least significant bit is
cleared to "0." The most significant bit shifts into the carry flag.
The operation is shown schematically below.
MSB
C
Bit 7
The SHLL instruction is identical to the SHAL instruction except for its effect on the overflow
(V) flag.
<Instruction Formats>
Addressing
mode
Register direct
LSB
Bit 0
Mnem.
Operands
SHLL
Rd
<Condition Code>
I
— — — —
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to "1" if the result is negative;
otherwise cleared to "0."
Z: Set to "1" if the result is zero; otherwise
cleared to "0."
V: Cleared to "0."
C: Receives the previous value in bit 0.
0
Instruction code
1st byte
2nd byte
1
0
0
rd
106
H
N
Z
3rd byte
4th byte
SHLL
V
C
0
No. of
states
2
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