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The DAA and DAS instruction perform decimal arithmetic adjustments on byte data in
packed BCD form. Each 4-bit of the byte is treated as a decimal digit.
The MOV.W, ADD.W, SUB.W, CMP.W, ADDS, SUBS, MULXU (8 bits × 8 bits), and
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DIVXU (16 bits ÷ 8 bits) instructions operate on word data.
Data Structure in General Registers: Data of all the sizes above can be stored in general
registers as shown in figure 1-1.
Data type
1-Bit data
1-Bit data
Byte data
Byte data
Word data
4-Bit BCD data
4-Bit BCD data
RnH: Upper 8 bits of General Register
RnL: Lower 8 bits of General Register
MSB: Most Significant Bit
LSB: Least Significant Bit
Register No.
RnH
RnL
RnH
RnL
Rn
RnH
RnL
Figure 1-1. Register Data Structure
3
Data format
7
0
7 6 5 4 3 2 1 0
7
Don't-care
7 6 5 4 3 2 1 0
7
0
M
L
S
S
B
B
7
M
Don't-care
S
B
15
M
S
B
7
0
4 3
Upper digit
Lower digit
7
Don't-care
Upper digit
Don't-care
0
Don't-care
0
L
S
B
0
L
S
B
Don't-care
0
4 3
Lower digit
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