Instruction
Mnemonic
SHAL
SHAL.B Rd
SHAR
SHAR.B Rd
SHLL
SHLL.B Rd
SHLR
SHLR.B Rd
SLEEP
SLEEP
STC
STC CCR, Rd
SUB
SUB.B Rs, Rd
SUB.W Rs, Rd
SUBS
SUBS.W #1/2, Rd
SUBX
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
XOR
XOR.B #xx:8, Rd
XOR.B Rs, Rd
XORC
XORC #xx:8, CCR
Notes:
*1
n: Initial value in R4L. The source and destination operands are accessed n + 1 times
each.
*2
Data access requires 9 to 16 states.
Instruction
Branch
Fetch
Addr. Read Operation Access
I
J
1
1
1
1
1
1
1
1
1
1
1
1
1
1
130
Stack
Byte Data Word Data Internal
K
L
Access
Operation
M
N