Renesas H8/300 Series Programming Manual page 25

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After Execution of BSET Instruction
P4
Input/output
Input
Pin state
Low
DDR
0
DR
0
Pull-up
Off
Explanation: To execute the BSET instruction, the CPU begins by reading port 4. Since P4
and P4
are input pins, the CPU reads the level of these pins directly, not the value in the data
6
register. It reads P4
Since P4
to P4
are output pins, for these pins the CPU reads the value in the data register
5
0
("0"). The CPU therefore reads the value of port 4 as H'40, although the actual value in P4DR
is H'80.
Next the CPU sets bit 0 of the read data to "1," changing the value to H'41.
Finally, the CPU writes this value (H'41) back to P4DR to complete the BSET instruction.
As a result, bit P4
0
P4
are both modified, changing the on/off settings of the MOS pull-up transistors of pins P4
6
and P4
.
6
Programming Solution: The switching of the pull-ups for P4
avoided by storing the same data in both the port-4 data register and in a work area in RAM.
Bit manipulations are performed on the data in the work area, after which the result is moved
into the port-4 data register. In the following example RAM0 is a symbol for the user-selected
address of the work area.
Before Execution of BSET Instruction
MOV.B
#80
MOV.B
R0L
MOV.B
R0L
P4
P4
7
6
Input
Output Output Output Output Output Output
High
Low
0
1
1
0
On
Off
as Low ("0") and P4
7
is set to "1," switching pin P4
;write data (H'80) for data register
R0L
;write to DR work area (RAM0)
@RAM0
;write to DR
@PORT4
P4
P4
5
4
3
Low
Low
1
1
0
0
Off
Off
as High ("1").
6
to High output. In addition, bits P4
0
19
P4
P4
P4
2
1
Low
Low
High
1
1
1
0
0
1
Off
Off
Off
and P4
in example 2 can be
7
6
0
7
and
7
7

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