Table of Contents
Advertisement
Table 1-12, Effective Address Calculation (2)
Addressing mode,
No.
instruction format
3
Register indirect with displacement
@(d:16, Rn)
7 6
15
OP
disp
4
Register indirect with pre-decrement
@-Rn
15
7 6
OP
Register indirect with post-increment
@Rn+
15
7 6
OP
5
Immediate #xx:8.
15
8 7
OP
Immediate #xx:16
15
OP
IMM
Effective address
calculation
15
16-bit register contents
15
4 3
0
16-bit register contents
16-bit displacement
reg
15
16-bit register contents
15
16-bit displacement
16-bit register contents
16-bit displacement
15
16-bit displacement
16-bit register contents
4 3
0
reg
15
16-bit register contents
4 3
0
reg
* 1 for a byte operand,
2 for a word operand
None
0
IMM
None
0
0
+
0
0
0
0
-
1 or 2*
0
+
1 or 2*
30
Effective
address
15
Operand address is sum
15
of register contents and
displacement
15
15
15
Register is decremented
before operand access
15
Register is incremented
after operand access
Register is incremented
after operand access
Operand is 1-byte
immediate data
Operand is 2-byte
immediate data
0
0
0
0
0
0
Advertisement
Table of Contents
