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Bit
7
I
Initial value
1
Read/Write
R/W
*
Undetermined
Bit 7—Interrupt Mask Bit (I): When this bit is set to "1," all interrupts except NMI are
masked. This bit is set to "1" automatically by a reset and at the start of interrupt handling.
Bits 6 and 4—User Bits (U): These bits can be written and read by software for its own
purposes.
Bit 5—Half-Carry (H): This bit is used by add, subtract, and compare instructions to indicate
a borrow or carry out of bit 3 or bit 11. It is referenced by the decimal adjust instructions.
Bit 3—Negative (N): This bit indicates the most significant bit (sign bit) of the result of an
instruction.
Bit 2—Zero (Z): This bit is set to "1" to indicate a zero result and cleared to "0" to indicate a
nonzero result.
Bit 1—Overflow (V): This bit is set to "1" when an arithmetic overflow occurs, and cleared
to "0" at other times.
Bit 0—Carry (C): This bit is used by:
•
Add, subtract, and compare instructions, to indicate a carry or borrow at the most
significant bit
•
Shift and rotate instructions, to store the value shifted out of the most or least significant
bit
•
Bit manipulation instructions, as a bit accumulator
System control instructions can load and store the CCR, and perform logic operations to set,
clear, or toggle selected bits.
1.2.3 Initial Register Values
When the CPU is reset, the program counter (PC) is loaded from the vector table and the
interrupt mask bit (I) in the CCR is set to "1." The other CCR bits and the general registers are
not initialized.
6
5
U
H
*
*
R/W
R/W
4
3
U
N
*
*
R/W
R/W
7
2
1
Z
V
*
*
R/W
R/W
0
C
*
R/W
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