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ORC (inclusive OR Control register)
<Operation>
CCR ∨ #IMM → CCR
<Assembly-Language Format>
ORC #xx:8, CCR
<Examples>
ORC #H'80, CCR
<Operand Size>
Byte
<Description>
This instruction ORs the condition code register (CCR) with immediate data and places the
result in the condition code register. Bits 6 and 4 are ORed as well as the flag bits.
No interrupt requests are accepted immediately after this instruction. All interrupts, including
the nonmaskable interrupt (NMI), are deferred until after the next instruction.
<Instruction Formats>
Addressing
mode
Immediate
Mnem.
Operands
ORC
#xx:8, CCR
<Condition Code>
I
I: ORed with bit 7 of the immediate data.
H: ORed with bit 5 of the immediate data.
N: ORed with bit 3 of the immediate data.
Z: ORed with bit 2 of the immediate data.
V: ORed with bit 1 of the immediate data.
C: ORed with bit 0 of the immediate data.
Instruction code
1st byte
2nd byte
0
4
IMM
95
H
N
Z
3rd byte
4th byte
ORC
V
C
No. of
states
2
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