Cpu Event Monitor Status Area 2 (Address: 3000 To 3018) - Mitsubishi Electric MELSEC Q Series User Manual

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3 SPECIFICATIONS

3.8.13 CPU event monitor status area 2 (Address: 3000 to 3018)

Address:
Address:
3 - 51
(c)
The following is observed when a CPU event monitor error occurs.
(Example) When an error occurs in CPU event monitor of the CPU event
setting No. 16
 CPU event monitor error (X13) turns on
 CPU event monitor error data area (address: 3308 (bit 15)) of
 The error code is stored into the CPU event monitor 16 error
(4) CPU event monitor 1 to 64 error code (Address: 3312 to 3375)
The error code that indicates the error status is stored into the corresponding
CPU event setting No. area.
Refer to Section 9.3 for the error code.
The status related to the CPU event monitor function can be confirmed.
Refer to Section 6.5 for the CPU event monitor function.
POINT
When using the product whose first 5 digits of serial No. are 05112 or later, use the
CPU event monitor status area 1 (address: 3300 to 3375). (Refer to Section 3.8.12)
When this area has been used previously, it can be used as-is.
(1) CPU event setting data (Address: 3000)
(a)
This area stores information on whether "CPU event setting" in the event
setting has been made or not.
(b)
The bit corresponding to the preset CPU event setting No. turns on.
0: Not set
1: Set
b15
b14
b13
b12
3000
16
15
14
13
(2) CPU event occurrence data (Address: 3001)
(a)
This area stores the CPU event occurrence results.
(b)
The bit corresponding to the CPU event setting No. of a CPU event turns
on.
0: Event not occurred
1: Event occurred
b15
b14
b13
b12
3001
16
15
14
13
(c)
A CPU event occurs when the monitoring condition set in "CPU event
setting" of the event setting is satisfied.
the buffer memory turns on.
code area (address: 3329) of the buffer memory.
b11
b10 b9
b8 b7
b6
12
11
10
9
8
7
b11
b10 b9
b8 b7
b6
12
11
10
9
8
7
b5 b4 b3 b2 b1
b0
6
5
4
3
2
1
b5 b4 b3 b2 b1
b0
6
5
4
3
2
1
MELSEC-Q
3 - 51

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