ABB Relion 670 Series Applications Manual page 232

Phasor measurement unit
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Section 15
Logic
For controllable gates, settable timers and SR flip-flops with memory, the setting parameters are
accessible via the local HMI or via the PST tool.
15.6.2.1
Configuration
Logic is configured using the ACT configuration tool in PCM600.
Execution of functions as defined by the configurable logic blocks runs according to a fixed
sequence with different cycle times.
For each cycle time, the function block is given an serial execution number. This is shown when
using the ACT configuration tool with the designation of the function block and the cycle time, see
example below.
IEC09000695 V2 EN-US
Figure 87: Example designation, serial execution number and cycle time for logic function
IEC09000310 V2 EN-US
Figure 88: Example designation, serial execution number and cycle time for logic function
The execution of different function blocks within the same cycle is determined by the order of
their serial execution numbers. Always remember this when connecting two or more logical
function blocks in series.
226
that also propagates timestamp and quality of input signals
Always be careful when connecting function blocks with a fast cycle time to
function blocks with a slow cycle time.
Remember to design the logic circuits carefully and always check the execution
sequence for different functions. In other cases, additional time delays must be
introduced into the logic schemes to prevent errors, for example, race between
functions.
© Copyright 2017 Hitachi Power Grids. All rights reserved
IEC09000695_2_en.vsd
IEC09000310-2-en.vsd
1MRK 511 407-UUS Rev. J
GUID-D93E383C-1655-46A3-A540-657141F77CF0 v4
Phasor measurement unit RES670
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