Sram Data Memory - Atmel ATtiny25 Manual

Microcontroller with 2/4/8k bytes in-system programmable flash
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5.2

SRAM Data Memory

ATtiny25/45/85
14
Figure 5-1.
Program Memory Map
Figure 5-2
shows how the ATtiny25/45/85 SRAM Memory is organized.
The lower 224/352/607 Data memory locations address both the Register File, the I/O memory
and the internal data SRAM. The first 32 locations address the Register File, the next 64 loca-
tions the standard I/O memory, and the last 128/256/512 locations address the internal data
SRAM.
The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 128/256/512 bytes of inter-
nal data SRAM in the ATtiny25/45/85 are all accessible through all these addressing modes.
The Register File is described in
Figure 5-2.
Data Memory Map
Program Memory
0x0000
0x03FF/0x07FF
"General Purpose Register File" on page
Data Memory
0x0000 - 0x001F
32 Registers
0x0020 - 0x005F
64 I/O Registers
0x0060
Internal SRAM
(128/256/512 x 8)
0x0DF/0x015F/0x025F
9.
7598H–AVR–07/09

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