Register Summary - Atmel ATtiny25 Manual

24. Register Summary

Address Name
0x3F SREG
0x3E SPH
0x3D SPL
0x3C Reserved
0x3B GIMSK
0x3A GIFR
0x39 TIMSK
0x38 TIFR
0x37 SPMCSR
0x36 Reserved
0x35 MCUCR
0x34 MCUSR
0x33 TCCR0B
0x32 TCNT0
0x31 OSCCAL
0x30 TCCR1
0x2F TCNT1
0x2E OCR1A
0x2D OCR1C
0x2C GTCCR
0x2B OCR1B
0x2A TCCR0A
0x29 OCR0A
0x28 OCR0B
0x27 PLLCSR
0x26 CLKPR
0x25 DT1A
0x24 DT1B
0x23 DTPS1
0x22 DWDR
0x21 WDTCR
0x20 PRR
0x1F EEARH
0x1E EEARL
0x1D EEDR
0x1C EECR
0x1B Reserved
0x1A Reserved
0x19 Reserved
0x18 PORTB
0x17 DDRB
0x16 PINB
0x15 PCMSK
0x14 DIDR0
0x13 GPIOR2
0x12 GPIOR1
0x11 GPIOR0
0x10 USIBR
0x0F USIDR
0x0E USISR
0x0D USICR
0x0C Reserved
0x0B Reserved
0x0A Reserved
0x09 Reserved
Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory
addresses should never be written.
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
ATtiny25/45/85
182
Bit 7 Bit 6 Bit 5
I T H
– – –
SP7 SP6 SP5
– INT0 PCIE
– INTF0 PCIF
– OCIE1A OCIE1B
– OCF1A OCF1B
– – –
BODS PUD SE
– – –
FOC0A FOC0B –
CTC1 PWM1A COM1A1
Timer/Counter1 Output Compare Register A
Timer/Counter1 Output Compare Register C
TSM PWM1B COM1B1
Timer/Counter1 Output Compare Register B
COM0A1 COM0A0 COM0B1
Timer/Counter0 – Output Compare Register A
Timer/Counter0 – Output Compare Register B
SM – –
CLKPCE – –
DT1AH3 DT1AH2 DT1AH1
DT1BH3 DT1BH2 DT1BH1
- - -
WDTIF WDTIE WDP3
–
EEAR7 EEAR6 EEAR5
– – EEPM1
– – PORTB5
– – DDB5
– – PINB5
– – PCINT5
– – ADC0D
USICIF USIOIF USIPF
USISIE USIOIE USIWM1
Bit 4 Bit 3 Bit 2
S V N
– – –
SP4 SP3 SP2
–
– – –
– – –
OCIE0A OCIE0B TOIE1
OCF0A OCF0B TOV1
CTPB RFLB PGWRT
–
SM1 SM0 BODSE
– WDRF BORF
– WGM02 CS02
Timer/Counter0
Oscillator Calibration Register
COM1A0 CS13 CS12
Timer/Counter1
COM1B0 FOC1B FOC1A
COM0B0 –
– – PCKE
– CLKPS3 CLKPS2
DT1AH0 DT1AL3 DT1AL2
DT1BH0 DT1BL3 DT1BL2
- - -
DWDR[7:0]
WDCE WDE WDP2
PRTIM1 PRTIM0
EEAR4 EEAR3 EEAR2
EEPROM Data Register
EEPM0 EERIE EEMWE
–
–
–
PORTB4 PORTB3 PORTB2
DDB4 DDB3 DDB2
PINB4 PINB3 PINB2
PCINT4 PCINT3 PCINT2
ADC2D ADC3D ADC1D
General Purpose I/O Register 2
General Purpose I/O Register 1
General Purpose I/O Register 0
USI Buffer Register
USI Data Register
USIDC USICNT3 USICNT2
USIWM0 USICS1 USICS0
–
–
–
–
Bit 1 Bit 0
Z C
– SP8
SP1 SP0
– –
– –
TOIE0 –
TOV0 –
PGERS SPMEN page 132
ISC01 ISC00 page 31,
EXTRF PORF
CS01 CS00
CS11 CS10
PSR1 PSR0 page
WGM01 WGM00
PLLE PLOCK
CLKPS1 CLKPS0
DT1AL1 DT1AL0
DT1BL1 DT1BL0
DTPS11 DTPS10
page 129
WDP1 WDP0
PRUSI PRADC
EEAR8
EEAR1 EEAR0
EEWE EERE
PORTB1 PORTB0
DDB1 DDB0
PINB1 PINB0
PCINT1 PCINT0
EIN1D AIN0D page 110,
page 104
page 103
USICNT1 USICNT0 page 104
USICLK USITC page 105
7598H–AVR–07/09
Page
page 7
page 10
page 10
page 59
page 60
page 77
page 77
page 54, page 59
page 40
page 75
page 76
page 26
page 84
page 86
page 86
page 87
80, page 85
page 87
page 72
page 76
page 77
page 89
page 29
page 95
page 95
page 94
page 42
page 33
page 16
page 16
page 16
page 16
page 58
page 58
page 58
page 60
page 127