128 Khz Internal Oscillator - Atmel ATtiny25 Manual

6.7.1 High Frequency PLL Clock - PLL
6.8

128 kHz Internal Oscillator

ATtiny25/45/85
28
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
29 for details.
CLK
There is an internal PLL that provides nominally 64 MHz clock rate locked to the RC Oscillator
for the use of the Peripheral Timer/Counter1 and for the system clock source. When selected as
a system clock source, by programming the CKSEL fuses to '0001', it is divided by four like
shown in Table 6-10. When this clock source is selected, start-up times are determined by the
SUT fuses as shown in Table
Table 6-10. PLLCK Operating Modes
CKSEL3..0
0001
Table 6-11. Start-up Times for the PLLCK
Start-up Time from Power
SUT1..0 Down and Power Save
00
01 16K CK
10
11 16K CK
The 128 kHz internal Oscillator is a low power Oscillator providing a clock of 128 kHz. The fre-
quency is nominal at 3V and 25°C. This clock may be select as the system clock by
programming the CKSEL Fuses to "11".
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table 6-12.
Table 6-12. Start-up Times for the 128 kHz Internal Oscillator
Start-up Time from
SUT1..0 Power-down and Power-save
00
01
10
11
6-11. See also "PCK Clocking System" on page
Additional Delay from
Reset (V
1K CK
1K CK
Additional Delay from
6 CK
6 CK
6 CK
"System Clock Prescaler" on page
Nominal Frequency
16 MHz
= 5.0V) Recommended usage
CC
14CK + 8ms BOD enabled
14CK + 8ms Fast rising power
14CK + 68 ms Slowly rising power
14CK + 68 ms Slowly rising power
Reset Recommended Usage
14CK BOD enabled
14CK + 4 ms Fast rising power
14CK + 64 ms Slowly rising power
Reserved
23.
7598H–AVR–07/09