High-Voltage Serial Programming Algorithm Sequence - Atmel ATtiny25 Manual

21.8

High-voltage Serial Programming Algorithm Sequence

21.8.1 Enter High-voltage Serial Programming Mode
21.8.2 Considerations for Efficient Programming
21.8.3 Chip Erase
ATtiny25/45/85
144
To program and verify the ATtiny25/45/85 in the High-voltage Serial Programming mode, the fol-
lowing sequence is recommended (See instruction formats in
The following algorithm puts the device in High-voltage Serial Programming mode:
1. Apply 4.5 - 5.5V between V
2. Set RESET pin to "0" and toggle SCI at least six times.
3. Set the Prog_enable pins listed in
4. Apply V - 5.5V to RESET. Keep the Prog_enable pins unchanged for at least
HVRST
t after the High-voltage has been applied to ensure the Prog_enable signature has
HVRST
been latched.
5. Shortly after latching the Prog_enable signature, the device will activly output data on
the Prog_enable[2]/SDO pin, and the resulting drive contention may increase the power
consumption. To minimize this drive contention, release the Prog_enable[2] pin after
t has elapsed.
HVRST
6. Wait at least 50 µs before giving any serial instructions on SDI/SII.
Table 21-15. High-voltage Reset Characteristics
Supply Voltage RESET Pin High-voltage Threshold
V
CC
4.5V
5.5V
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
• The command needs only be loaded once when writing or reading multiple memory
locations.
• Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless the
EESAVE Fuse is programmed) and Flash after a Chip Erase.
• Address High byte needs only be loaded before programming or reading a new 256 word
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading.
The Chip Erase will erase the Flash and EEPROM
not reset until the Program memory has been completely erased. The Fuse bits are not
changed. A Chip Erase must be performed before the Flash and/or EEPROM are
re-programmed.
Note: 1. The EEPROM memory is preserved during Chip Erase if the EESAVE Fuse is programmed.
1. Load command "Chip Erase" (see
2. Wait after Instr. 3 until SDO goes high for the "Chip Erase" cycle to finish.
3. Load Command "No Operation".
and GND.
CC
Table 21-14 to "000" and wait at least 100 ns.
V
HVRST
11.5V
11.5V
(1)
memories plus Lock bits. The Lock bits are
Table 21-16).
Table 21-16):
Minimum High-voltage Period for
Latching Prog_enable
t
HVRST
100 ns
100 ns
7598H–AVR–07/09