12 8-Bit Timer/Counter0 With Pwm; Overview - Atmel ATtiny25 Manual

Microcontroller with 2/4/8k bytes in-system programmable flash
Table of Contents

Advertisement

12. 8-bit Timer/Counter0 with PWM
12.1

Overview

12.1.1
Registers
7598H–AVR–07/09
Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output
Compare Units, and with PWM support. It allows accurate program execution timing (event man-
agement) and wave generation. The main features are:
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
A simplified block diagram of the 8-bit Timer/Counter is shown in
placement of I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
"8-bit Timer/Counter Register Description" on page
Figure 12-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
"Pinout ATtiny25/45/85" on page
Count
Clear
Control Logic
Direction
TOP
BOTTOM
Timer/Counter
TCNTn
=
=
OCRnA
Fixed
TOP
Value
=
OCRnB
TCCRnA
TCCRnB
ATtiny25/45/85
Figure
2. CPU accessible I/O Registers,
72.
TOVn
(Int.Req.)
Clock Select
clk
Tn
Edge
Detector
( From Prescaler )
=
0
OCnA
(Int.Req.)
Waveform
Generation
OCnB
(Int.Req.)
Waveform
Generation
12-1. For the actual
Tn
OCnA
OCnB
).
T0
61

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Attiny45Attiny85

Table of Contents