ABB Relion 670 Series Commissioning Manual page 137

1MRK 506 371-UUS E
6. Vary the faulty phase voltage to achieve the impedance at the test point P2. At this point,
observe that the output ZOUT is activated and then continue to inject for a duration greater
than
7. Inject the faulty phase voltage to achieve the impedance at the test point P3. At this point,
observe that the outputs ZIN and START are activated. It indicates that power swing has
been detected.
8. Inject the faulty phase voltage in accordance with the test point P1.
9. At this condition, the outputs ZIN and ZOUT get deactivated and START signal will be
maintained for a set duration of
10. To detect consecutive power swings, repeat steps 5, 6,
output START will be activated.
11. Repeat step
activated.
12. Repeat step
13. At this condition, it will be detected as consecutive power swing and the output signal START
will be maintained.
14. Repeat step
be disappeared after set duration of
15. Repeat the above steps to test and detect power swing condition in at least two phases by
enabling input REL2PH.
16. By enabling the input BLK1H, operation mode for power swing detection in any phase will be
blocked.
17. Similarly, operation mode for power swing detection in at least two phases will be blocked by
enabling the input BLK2PH.
18. Repeat steps 5,
START, ZOUT and ZIN will be disappeared.
19. Output signal START will also get activated instantaneously by enabling input EXTERNAL and
this input signal can be configured in ACT to the output derived from some external logics
used to detect power swings. By enabling the input signal BLOCK, the output signal START
will be deactivated.
Testing the inhibit logic of power swing detection function
The following output signals shall be configured to binary output available: ZOUT, measured
impedance within outer impedance boundary and ZIN, measured impedance within inner
impedance boundary and START, power swing detection.
1. Set
kLdRRv to values that are in accordance with the selectivity plan and the corresponding
operating characteristic is shown in Figure 38.
2. Set
values.
3. Enable the input signal REL1PH to detect the power swing in one of the three phases.
Inhibit START output by the presence of residual current
Preconditions
The input signal I0CHECK, residual current (3I0) detection used to inhibit the start output, must be
configured to the output signal STPE on the FDPSPDIS, FRPSPDIS, ZMFPDIS or ZMFCPDIS function.
The input signal BLKI02, block inhibit of the start output for subsequent residual current
detection, is connected to FALSE.
Line distance protection REL670
Commissioning manual
tP1 .
6 and inject before the expiration of timer
7 after a set duration of
8 and the outputs ZOUT and ZIN get deactivated. The output signal START will
6 and7, and enable the input signal BLOCK. At this condition, the outputs
X1InFw , R1LIn , X1InRv , R1FInFw , R1FInRv , ArgLd , RLdOutFw , RLdOutRv , kLdRFw and
OperationLdCh to On and set timers tP1 , tP2 , tW , tH , tR1 , tR2 and tEF to their default
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tH .
7
tW . The output ZOUT will be
tP2 . The output ZIN will be activated.
tH from the instance of step 13.
Testing functionality by secondary injection
and 8. With this condition, the
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