Pso Interlock (J7); Figure 2-30: Pso Interlock Opto Input And Reset Output; Table 2-25: Pso Interlock Specifications; Table 2-26: Reset Specifications - Aerotech Npaq DL 4010 Series Hardware Manual

Npaq® Hardware Manual

2.7.3. PSO Interlock (J7)

The PSOILOCK (PSO Interlock) input signal is shown in
generation. To allow pulses to occur, the PSOILOCK input signal must be forward biased or it must be
disabled using the "Npaq PSO Interlock" setting of the IOSetup parameter. See the A3200 Help file for more
information. Table 2-25 shows the PSO Interlock specifications.
Figure 2-30:
Table 2-25: PSO Interlock Specifications
Description
Input Voltage Range
Table 2-26: Reset Specifications
Description
Output Voltage Level
Max. Current (Sink / Source)
Output Type
62
Figure 2-30
PSO Interlock Opto Input and Reset Output
Chapter 2
Installation and Configuration
and it may be used to inhibit pulse
Table 2-26 shows the reset specifications.
Specification
5 - 24 V
Specification
LVTTL (3.3 V)
24 ma
Active Low
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