General DataComm Xedge 6000 Series Hardware Installation page 135

Line Interface Modules
LCE-16 Connector Pin/Signal Designations
Table 5-12 shows the link, pin/signal and input/output designations for the front panel Link 0-7 and
Link 8-15 connectors. All A/B signal pairs listed in the Signal Name column require twisted pair
wiring. Refer to Note 1 and Note 1 at the end of this table for additional information.
Table 5-12
Connector Pin / Signal / Input / Output List, Link 0-7 and Link 8-15
Link Pin Signal Name
0/8 1 Chassis Ground
0/8 2 Carrier Detect-A (DCD-A)
0/8 3 Transmit Data-A (TD-A)
0/8 4 Transmit Data-B (TD-B)
0/8 5 Transmit Timing-A (TT-A)
0/8 6 Transmit Timing-B (TT-B)
0/8 7 Clear to Send-A (CTS-A)
0/8 8 Clear to Send-B (CTS-B)
0/8 9 DCE Ready-A (DSR-A)
0/8 10 DCE Ready-B (DSR-B)
1/9 11 Chassis Ground
0/8 12 Carrier Detect-B (DCD-B)
1/9 13 Receive Data-A (RD-A)
1/9 14 Receive Data-B (RD-B)
1/9 15 Receive Timing-A (RT-A)
1/9 16 Receive Timing-B (RT-B)
1/9 17 External Timing-A (ET-A)
1/9 18 External Timing-B (ET-B)
1/9 19 Request to Send-A (RTS-A)
1/9 20 Request to Send-B (RTS-B)
1/9 21 DTE Ready-A (DTR-A)
1/9 22 DTE Ready-B (DTR-B)
2/10 23 Receive Data-A (RD-A)
2/10 24 Receive Data-B (RD-B)
2/10 25 Receive Timing-A (RT-A)
2/10 26 Receive Timing-B (RT-B)
2/10 27 External Timing-A (ET-A)
2/10 28 External Timing-B (ET-B)
3/11 29 Receive Data-A (RD-A)
3/11 30 Receive Data-B (RD-B)
3/11 31 Receive Timing-A (RT-A)
3/11 32 Receive Timing-B (RT-B)
3/11 33 External Timing-A (ET-A)
3/11 34 External Timing-B (ET-B)
4/12 35 Receive Data-A (RD-A)
032R440-000
Issue 17
Input/
Link Pin
Output
n/a 0/8 51
(see Note 2) 0/8 52
Input 0/8 53
Input 0/8 54
(see Note 1) 0/8 55
(see Note 1)
0/8 56
Output 0/8 57
Output 0/8 58
Output 0/8 59
Output 0/8 60
n/a 0/8 61
(see Note 2 1/9 62
Output 1/9 63
Output 1/9 64
Output 1/9 65
Output 1/9 66
Input 1/9 67
Input 1/9 68
Input 1/9 69
Input 1/9 70
Input 2/10 71
Input 3/11 72
Output 2/10 73
Output 2/10 74
Output 2/10 75
Output 2/10 76
Input 4/12 77
Input 5/13 78
Output 3/11 79
Output 3/11 80
Output 3/11 81
Output 3/11 82
Input 6/14 83
Input 7/15 84
Output 4/12 85
Xedge 6000 Hardware
Installation & Setup Guide
LCE-16 LIM Overview
Signal Name
Receive Data-A (RD-A)
Receive Data-B (RD-B)
Receive Timing-A (RT-A)
Receive Timing-B (RT-B)
External Timing-A (ET-A)
External Timing-B (ET-B)
Request to Send-A (RTS-A)
Request to Send-B (RTS-B)
DTE Ready-A (DTR-A)
DTE Ready-B (DTR-B)
Signal Common
Signal Common
Transmit Data-A (TD-A)
Transmit Data-B (TD-B)
Transmit Timing-A (TT-A)
Transmit Timing-B (TT-B)
Clear to Send-A (CTS-A)
Clear to Send-B (CTS-B)
DCE Ready-A (DSR-A)
DCE Ready-B (DSR-B)
Chassis Ground
Chassis Ground
Transmit Data-A (TD-A)
Transmit Data-B (TD-B)
Transmit Timing-A (TT-A)
Transmit Timing-B (TT-B)
Chassis Ground
Chassis Ground
Transmit Data-A (TD-A)
Transmit Data-B (TD-B)
Transmit Timing-A (TT-A)
Transmit Timing-B (TT-B)
Chassis Ground
Chassis Ground
Transmit Data-A (TD-A)
Input/
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
n/a
n/a
Input
Input
(see Note 1)
(see Note 1)
Output
Output
Output
Output
n/a
n/a
Input
Input
(see Note 1)
(see Note 1)
n/a
n/a
Input
Input
(see Note 1)
(see Note 1)
n/a
n/a
Input
5-33