Keysight E1458A Register Information
Port Interrupt Control Register
The Port Interrupt Control Register is an 8-bit read/write register and functions
as the interrupt register for the port. This register shows the interrupt enable
status, the level of interrupt that can signal the controller (always set to 0), and
whether an interrupt is pending. The ports affected by this register are set by the
BB1 and BB0 bits in the Card Status/Control Register.
Bits (0-3). Unused
IL0 and IL1 (Interrupt Level). Both bits must be left at 0 to initialize the Keysight
E1458A Digital I/O Module for interrupt operation.
IP (Interrupt pending). When equal to 1, indicates an interrupt is pending. This is a
read/write bit. You can force a hardware interrupt by setting this bit to 1 if PIEN is
set to 1 and IEN is set to 1 in the Status/Control Register.
PIEN (Port Interrupt enable). When set to 1, enables interrupt. Pending or forced
interrupts are ignored if set to 0.
Figure B-3 Interrupt Line Logic Diagram
128
base+2016, base+2116, base+2216, base+2316
7
6
5
PIEN
IP
IL1
4
3
2
IL0
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Keysight E1458A 96-Channel Digital I/O Module User Guide
Register Descriptions
1
0
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