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E1459A
Keysight E1459A Manuals
Manuals and User Guides for Keysight E1459A. We have
1
Keysight E1459A manual available for free PDF download: User & Scpi Programming Manual
Keysight E1459A User & Scpi Programming Manual (124 pages)
64-Channel Isolated Input Interrupt Module
Brand:
Keysight
| Category:
I/O Systems
| Size: 2.37 MB
Table of Contents
Table of Contents
7
1 Installing and Configuring the E1459A
11
Functional Description
11
Watchdog Timer
13
Input Level Selection
13
Input Isolation
13
Input Debounce Processing
14
Programmable Debounce Parameters
14
Input Edge Detection
15
Edge Detection Examples
15
Input Data Capture
17
Front Panel Markers
18
Interrupt Driven or Polled Mode Operations
18
Interrupt Parsing
18
Configuring for Installation
19
Setting the Logical Address
20
Setting the Interrupt Priority
20
Setting Input Threshold Levels
21
Setting the Reset Time on the Watchdog Timer
22
Connecting User Inputs
23
Installing the Keysight E1459A in a Vxibus Mainframe
25
Terminal Block
26
Wiring Guidelines
26
Wiring a Terminal Block
27
2 Using the Keysight E1459A Module
29
Power-On / Reset States
30
Example 1: Reset, Self Test, and Module ID
30
Digital Input
32
Example 2: Digital Input
32
Edge Detected Event Detection
34
Polling the Port Summary Register
34
Polling the Status Subsystem
34
SRQ Interrupt
34
Example 3: Edge Interrupt
37
3 Keysight E1459A SCPI Command Reference
41
Common Command Format
41
SCPI Command Format
41
Command Separator
42
Abbreviated Commands
42
Implied Commands
42
Command Parameters
43
Linking Commands
43
Diagnostic:sysreset Subsystem
44
Syntax
44
Diagnostic:sysreset[:State]
44
Diagnostic:sysreset:enable <State
45
Diagnostic:sysreset:enable
45
Display:monitor Subsystem
46
Display:monitor:port <Port
46
Display:monitor:port? [Minimum | Maximum | Default]
47
Display:monitor:port:auto <State
47
Display:monitor:port:auto
48
Display:monitor[:State] <State
48
Syntax
50
Inputn:clock[:Source] <Source
50
Inputn:clock[:Source]
51
Inputn:debounce:time <Time> | Minimum | Maximum | Default
51
Inputn:debounce:time? [Minimum | Maximum | Default]
52
Measure Subsystem
53
Syntax
53
Measure:digital:datan[:Type] [:Value]
53
Measure:digital:datan[:Type]:Bitm
54
Memory Subsystem
55
Memory:delete:macro <Name
55
Sense Subsystem
56
Syntax
56
[Sense:]Event:portn:davailable
57
[Sense:]Event:portn:davailable:enable <State
57
[Sense:]Event:portn:davailable:enable
58
[Sense:]Event:portn:edge
58
[Sense:]Event:portn:edge:enable <State
59
[Sense:]Event:portn:edge:enable
59
[Sense:]Event:portn:nedge
60
[Sense:]Event:portn:nedge:enable <Mask
60
[Sense:]Event:portn:nedge:enable
61
[Sense:]Event:portn:pedge
61
[Sense:]Event:portn:pedge:enable <Mask
62
[Sense:]Event:portn:pedge:enable
62
[Sense:]Event:psummary:davailable
63
[Sense:]Event:psummary:edge
63
Status Subsystem
65
Syntax
65
Status:operation:condition
67
Comments
67
Status:operation:enable <Mask
67
Status:operation:enable
68
Status:operation[:Event]
68
Parameters
68
Status:operation:psummary:condition
68
Status:operation:psummary:enable <Mask
69
Status:operation:psummary:enable
70
Status:operation:psummary[:Event]
70
Status:preset
70
Status:questionable:condition
71
Status:questionable:enable <Mask
71
Status:questionable:enable
72
Status:questionable[:Event]
72
System Subsystem
73
Syntax
73
System:cdescription? <Number
73
System:ctype? <Number
74
System:error
74
System:version
75
IEEE 488.2 Common Commands
76
Command Quick Reference
78
A Keysight E1459A Specifications
81
B Keysight E1459A Register Definitions
83
Overview
83
Addressing the Registers
85
Register Access with Logical Address
85
Register Access with Memory Mapping
85
Register Definitions
86
Manufacturer ID Register
87
Device Type Register
87
ID Register
87
Status/Control Register
88
Edge Interrupt Status Register
90
Data Available Status Register
90
Watchdog Timer Control/Status Register
91
Command Register Port 0/2
91
Channel Data Register Port 0/2
93
Positive Edge Detect Register Port 0/2
94
Negative Edge Detect Register Port 0/2
95
Positive Mask Register Port 0/2
95
Debounce Clock Register Port 0 and Port1/ Port 2 and Port 3
96
Command Register Port 1/3
98
Channel Data Register Port 1/3
99
Positive Edge Detect Register Port 1/3
99
Negative Edge Detect Register Port 1/3
100
Positive Mask Register Port 1/3
100
Negative Mask Register Port 1/3
101
Debounce Clock Register Port 0 and Port 1/ Port 2 and Port 3
101
Power On/Reset Conditions
103
Programming Examples
103
Output and Edge Detection Examples
105
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