Card Interrupt Status Register - Keysight VXI Bus 75000 C Series User And Programming Manual

Register Descriptions
BB0 and BB1 are the bank enable bits. These bits must be set before accessing
any port registers (from 2016 to 3F16). The three legal states of these bits and
the port registers they enable access to are shown below:
MODID. A 1 in this field indicates the device not selected via the P2 connector
MODID line. A 0 indicates that the device is selected. The MODID line and this bit
is written by slot 0 device (command modules). The VMEbus Extensions for
Instrumentation System Specification contains additional descriptions of this bit
in the "Device Operation" and "System Resources" sections.

Card Interrupt Status Register

The Card Interrupt Status Register is a 16-bit read-only register at addresses
0816 and 0916. When interrupt is enabled, this register indicates which port
caused the interrupt. The following table shows the register bit patterns.
In set to 1 indicates an interrupt was generated by the port controller n. These
bits are cleared after a soft or hard reset.
Keysight E1458A 96-Channel Digital I/O Module User Guide
A potential race condition exists when clearing this bit or masking
interrupts by means of register 0816 through 0B16. If an interrupt
occurs just before interrupts are masked, it could be asserted on
the VXIbus but not acknowledged by the digital I/O module.
Therefore, use care in disabling interrupts once they have been
enabled.
BB1
0
0
1
The ports are divided into three banks for register control.
Mechanically, the ports are divided into four connectors.
base+ 0816
15 14 13 12 11
1 1 1 1 I10
Keysight E1458A Register Information
BB0 Ports Enabled
0 0, 1, 2, and 3
1 4, 5, 6, and 7
0 8, 9, 10, and 11
base+0916
10 9 8 7 6
I11 I8 I9 I6 I7
5 4 3 2 1
I4 I5 I2 I3 I0
0
I1
127