Edge Interrupt Status Register; Data Available Status Register - Keysight E1459A User & Scpi Programming Manual

64-channel isolated input interrupt module
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Keysight E1459A Register Definitions

Edge Interrupt Status Register

The Edge Interrupt Status Register (base + 06
been detected for any of the 4 ports. There are 4 bits used in this register, one for
each port. A bit will remain asserted ("1") in this register until all edge events for
a port have been cleared. Bit 0 is used for Port 0, bit 1 for Port 1, bit 2 for Port 2,
and bit 3 for Port 3. These bits reflect the state of the INTR lines available on the
terminal module. The INTR lines will be asserted when a bit is "1" in this register.
This register has no effect if it is written.
Edge Interrupt Status Register (base + 06h)
b + 6
15
14
13
h
Write
No Effect
Read
Always Returns FFF
INTRX = Edge interrupt for port 0 - 3. A "1" means an edge event has been
detected within the corresponding port and a "0" means one hasn't. A bit set to
"1" will only return to "0" by reading the interrupt register that caused the edge
detection to occur.

Data Available Status Register

The Data Available Status Register (base + 08
has occurred for any of the 4 ports. There are 4 bits used in this register, one for
each port. A bit will be asserted when the DAV ENAB bit and the INT/EXT bit are
set ("1") in the command register for a port, and an external trigger occurs. (An
external trigger occurs on a negative edge). Bit 0 is used for Port 0, bit 1 for Port
1, bit 2 for Port 2, and bit 3 for Port 3. These bits reflect the state of the DAV lines
available on the terminal module. The DAV lines will be asserted when a bit is "1"
in this register. This register has no effect if it is written.
Data Available Register (base + 08h)
b + 8
15
14
13
h
Write
No Effect
Read
Always Returns FFF
DAVX = Data available in Port 0 - 3. A "1" means that new data has been latched
into the channel data register for that port. A "0" means it has not been triggered
yet. A bit set to "1" will only return to "0" by reading the DAV register associated
with that port.
90
12
11
10
9
h
12
11
10
9
h
) indicates if an edge interrupt has
h
8
7
6
5
4
) indicates if an external trigger
h
8
7
6
5
4
Keysight E1459A/Z2404B User and SCPI Programming Guide
Register Definitions
3
2
1
INTR3
INTR2
INTR1
3
2
1
DAV3
DAV2
DAV1
0
INTR0
0
DAV0

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Z2404a

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