Fujitsu MB89140 Series Hardware Manual page 97

A/D CONVERTER
Address: 001E ADC1
H
Address: 001F ADC2
H
Address: 0020 ADDH
H
Address: 0021 ADDL
H
ANS3 ANS2 ANS1 ANS0
0 0 0
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
0 1 1
0 1 1
HARDWARE CONFIGURATION
Description of Register
The detail of each register is described below.
(1) ADC1 (A/D Converter control register)
This register is used to control the A/D converter and display its status.
Bit 7
Address: 001E ANS3
H
(R/W)
[Bit 7 to Bit 4] ANS3 to ANS0: Analog input channel select bit
These three bits are used to select an analog input channel.
Channel selected
AN0
0
AN1
1
AN2
0
AN3
1
AN4
0
AN5
1
AN6
0
AN7
1
[Bit 3] ADI: Interrupt flag bit
The meaning of each bit to be read in the A/D mode is as follows:
0 Conversion not terminated
1 Conversion terminated
The meaning of each bit to be read in the sense mode is as follows:
0 Conditions specified by SIFM bit not met
1 Conditions specified by SIFM bit met
In both the A/D and sense modes, an interrupt request is output if this bit is
set when the ADIE (bit 4) of the ADC2 is 1.
The meaning of each bit to be written in the A/D and sense modes is as fol-
lows:
0 This bit is cleared.
1 This bit is not changed.
2-77
Bit 6 Bit 5 Bit 4 Bit 3
ANS2 ANS1 ANS0 AD1
(R/W) (R/W) (R/W) (R/W)
ANS3 ANS2 ANS1 ANS0 Channel selected
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 0
1 1
1 1 1 1
Bit 2 Bit 1 Bit 0
ADMV SIFM AD
(R) (R/W) (R/W)
Initial value
00000000
B
AN8
AN9
ANA
ANB
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