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A/D CONVERTER
HARDWARE CONFIGURATION
Precautions for A/D converter
(1) In the Reset mode, conversion and comparison stop to initialize each
register.
In the Stop mode, conversion and comparison stop to clear the flag bit
(ADMV bit (bit 2) of the ADC1) in operation. The settings of other bits
remain unchanged.
(2) If starting is performed by the external clock pulse, it cannot be done by
software (AD bit (bit 1) of the ADC1).
(3) Do not rewrite the setting of each register during conversion and com-
parison.
To change the setting with starting by the external clock pulse, set the
EXT bit (bit 1) of the ADC2 to 0 when the operation is stopped (ADMV bit
(bit 2) of the ADC1 is 0), and then inhibit starting by the external clock
pulse.
If the start is made by software (AD bit (bit 1) of the ADC1), the analog
input channel for restart can be switched and the interrupt source in the
Sense mode can be changed.
(4) To switch between the A/D and Sense modes, clear the interrupt flag bit
(ADI bit (bit 3) of the ADC1).
(5) To perform continuous starting of conversion and comparison by the ex-
ternal clock pulse, set the time based on the conversion and compari-
son timing, and results reading.
The A/D conversion value is effective until the next conversion is started
after conversion. The set value written at the data register in the Sense
mode is held even after comparison.
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