Fujitsu MB89140 Series Hardware Manual page 75

12-BIT MULTIPUL
GENERATOR
(MPG, TIMER 4)
8 bit
Address: 0024
MCNT
H
Address: 0025
INTSTR
H
Address: 0026
H
CMCLBR (H)
Address: 0027
H
CMCLR (H)
Address: 0028
H
OUTCBR (H)
Address: 0029
H
OUTCR (H)
HARDWARE CONFIGURATION
2.10 12-BIT MULTIPUL GENERATOR (MPG, TIMER 4)
A 12-bit-long up timer is provided with one compare clear register for
cycle setting and one compare register for output pin control to control
one real-time waveform output pin.
Four count clock sources can be selected.
The PWM operation or PPG operation at start by an external or internal
trigger can be selected on a programmable basis. This generator can
also be used as a toggle output timer.
Register list
CMCLBR (L)
CMCLR (L)
OUTCBR (L)
OUTCR (L)
2-55
R/W Control register
R/W Interrupt status register
W Compare clear buffer register
— Compare clear register
W Output buffer register
— Output compare register