Fujitsu MB89140 Series Hardware Manual page 77

12-BIT MULTIPUL
GENERATOR
(MPG, TIMER 4)
MCNT
Address: 0024
H
INTSTR
Address: 0025
H
Address: 0026
CMCLBR CMCLBR
H
(H)
Address: 0027
H
CMCLR CMCLR
(H)
Address: 0028
OUTCBR OUTCBR
H
(H)
Address: 0029
H
OUTCR OUTCR
(H)
HARDWARE CONFIGURATION
Description of registers
(1) Control register (MCNT)
This register is used to select the count clock pulse of the timer and the
PWM/PPG function, and to control setting of the software trigger.
(1) Interrupt level register (ILRX: Interrupt Level Register X)
Bit 7
Address: 0024
TSL1
H
(R/W)
(L)
[Bits 7 and 6] TSL1 and TSL0: Operation mode select bits
(L)
Bits 7 and 6 are used to select the operation mode. The PPG operation
mode or PWM operation mode can be selected as the operation mode. Ex-
(L)
ternal and software triggers can be selected in the PPG and PWM opera-
tion modes.
(L)
The retrigger enable mode or retrigger disable mode can be selected as
the PPG operation mode, whereas the retrigger enable mode only is se-
lected as the PWM operation mode.
TSL1 TSL0
0 0 Stop
0 1 PWM operation mode (retrigger enable)
1 0
PPG operation mode
1 1
Retrigger enable mode: When the start trigger (software trigger or exter-
Retrigger disable mode: Even when the start trigger (software trigger or
When the PWM operation mode is selected, the initial output of the MPG
enters the reset state (see the block diagram). When the PPG operation
mode is selected, the initial state of the MPG output is changed to the set
state.
When the stop mode is selected after the operation mode, the counter and
prescaler are cleared to inactivate the MPG output.
The operation mode should be selected during operation stop.
2-57
Bit 6 Bit 5 Bit 4 Bit 3
TSL0 CKS1 CKS0 SPOL
(R/W) (R/W) (R/W) (R/W)
Operation mode
Retrigger disable
Retrigger enable
nal trigger) is re-input during operation of the
MPG, the counter and prescaler of the MPG are
cleared and operation is restarted.
external trigger) is re-input during operation of the
MPG, it is ignored and operation is continued.
Bit 2 Bit 1 Bit 0
STRG PCN1 PCN0
(R/W) (R/W) (R/W)
Initial value
00000000
B