Operating Modes And System Clocks; Syste� Clocks - Holtek HT66F488 Manual

HT66F488/HT66F489
A/D Flash MCU with EEPROM

Operating Modes and System Clocks

Present day applications require that their microcontrollers have high performance but often still
demand that they consume as little power as possible, conflicting requirements that are especially
true in battery powered portable applications. The fast clocks required for high performance will
by their nature increase current consumption and of course vice-versa, lower speed clocks reduce
current consumption. As Holtek has provided this device with both high and low speed clock
sources and the means to switch between them dynamically, the user can optimise the operation of
their microcontroller to achieve the best performance/power ratio.
System Clocks
The device has many different clock sources for both the CPU and peripheral function operation.
By providing the user with a wide range of clock options using configuration options and register
programming, a clock system can be configured to obtain maximum application performance.
The main system clock, can come from either a high frequency, f
selected using the HLCLK bit and CKS2~CKS0 bits in the SMOD register. The high speed system
clock can be sourced from either an HXT or HIRC oscillator, selected via a configuration option.
The low speed system clock source can be sourced from internal clock f
can be sourced by either the LXT or LIRC oscillator, selected via a configuration option. The other
choice, which is a divided version of the high speed system oscillator has a range of f
There are two additional internal clocks for the peripheral circuits, the substitute clock, f
the Time Base clock, f
The f clock is used to provide a substitute clock for the microcontroller just after a wake-up has
SUB
occurred to enable faster wake-up times. The f
provides the clock for the Time base and TMs.
High Speed Oscillato�s
Low Speed Oscillato�s
Note: When the system clock source f
stop to conserve the power. Thus there is no f
Rev. 1.21
. Each of these internal clocks is sourced by the LIRC or LXT oscillator.
TBC
HXT
f
H
6-stage P�escale�
HIRC
High Speed Oscillato�
Configu�ation Option
f /32
H
f /64
LXT
H
f
L
LIRC
Low Speed Oscillato�
Configu�ation Option
f
SYS
System Clock Configurations
is switched to f
SYS
3�
, or a low frequency, f
H
. If f
L
is used for the Watchdog Timer while the f
SUB
f /2
H
f /4
H
f /8
H
f /16
H
f
L
HLCLK�
CKS2~CKS� �its
f
SUB
Fast Wake-up f�o� SLEEP Mode o�
IDLE Mode Cont�ol (fo� HXT only)
f
SUB
WDT
f
TBC
f
TB
Ti�e Base
/4
TBCK
from f , the high speed oscillation will
L H
~f /64 for peripheral circuit to use.
H H
�ove��e� ��� 2�1�
, and is
L
is selected then it
L
/2~f /64.
H H
, and
SUB
TBC
f
SYS