Operating Modes And System Clocks; System Clo - Holtek TinyPower HT69F40A Manual

HT69F30A/HT69F40A/HT69F50A
TinyPower I/O Flash 8-Bit MCU with LCD & EEPROM
TM

Operating Modes and System Clocks

Present day applications require that their microcontrollers have high performance but often still
demand that they consume as little power as possible, conflicting requirements that are especially
true in battery powered portable applications. The fast clocks required for high performance will
by their nature increase current consumption and of course vice-versa, lower speed clocks reduce
current consumption. As Holtek has provided these devices with both high and low speed clock
sources and the means to switch between them dynamically, the user can optimise the operation of
their microcontroller to achieve the best performance/power ratio.
System Clock
The device has many different clock sources for both the CPU and peripheral function operation.
By providing the user with a wide range of clock options using configuration options and register
programming, a clock system can be configured to obtain maximum application performance.
The main system clock, can come from either a high frequency, f
and is selected using the HLCLK bit and CKS2~CKS0 bits in the SMOD register. The high speed
system clock can be sourced from an HXT, ERC or HIRC oscillator, selected via a configuration
option. The low speed system clock source can be sourced from the clock, f
then it can be sourced by either the LXT or LIRC oscillators, selected via a configuration option.
The other choice, which is a divided version of the high speed system oscillator has a range of
f /2~f /64.
H H
The f clock is used to provide a substitute clock for the microcontroller just after a wake-up has
SUB
occurred to enable faster wake-up times.
High Speed �s�illation
(H�SC)
HXT
ERC
HIRC
EC
High Speed �s�illation
Configu�ation �ption
Low Speed �s�illation
(L�SC)
LIRC
LXT
Low Speed �s�illation
Configu�ation �ption
Note: When the system clock source f
conserve the power. Thus there is no f
Rev. 1.20
f /2
H
f /4
H
f /�
f
H
H
P�es�ale�
f /16
H
f /32
H
f /64
H
CKS[2:0]� HLCLK
f
SUB
System Clock Configurations
is switched to f from f
SYS SUB
~f /64 for peripheral circuit to use.
H H
�7
, or low frequency, f
H
. If f
SUB
Fast Wake-up f�om SLEEP Mode o�
IDLE Mode Cont�ol (fo� HXT only)
TBCK
f /4
SYS
÷
� LCD D�ive�
, the high speed oscillation will stop to
H
��to�e� 0�� 201�
, source,
SUB
is selected
SUB
f
SYS
f
TB
Time Base
fs
WDT