Operation; Normal Operation - Hitachi H8/3672 Series Hardware Manual

11.4

Operation

• Normal Operation

• PWM Operation
11.4.1 Normal Operation
TCNT performs free-running or periodic counting operations. After a reset, TCNT is set as a free-
running counter. When the CST bit in TMRW is set to 1, TCNT starts incrementing the count.
When the count overflows from H'FFFF to H'0000, the OVF flag in TSRW is set to 1. If the OVIE
in TIERW is set to 1, an interrupt request is generated. Figure 11-2 shows free-running counting.
TCNT value
H'FFFF
H'0000
CST bit
OVF
Periodic counting operation can be performed when GRA is set as an output compare register and
bit CCLR in TCRW is set to 1.
When the count matches GRA, TCNT is cleared to H'0000, the IMFA flag in TSRW is set to 1. If
the corresponding IMIEA bit in TIERW is set to 1, an interrupt request is generated. TCNT
continues counting from H'0000. Figure 11-3 shows periodic counting.
Rev. 1.0, 03/01, page 134 of 280
Figure 11-2 Free-Running Counter Operation
Time
Flag cleared
by software