Hitachi H8/3672 Series Hardware Manual page 183

Bit Bit Name
3 MPIE
2 TEIE
1 CKE1
0 CKE0
Legend
X: Don't care
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
Multiprocessor Interrupt Enable (enabled only
when the MP bit in SMR is 1 in asynchronous
mode)
When this bit is set to 1, receive data in which the
multiprocessor bit is 0 is skipped, and setting of
the RDRF, FER, and OER status flags in SSR is
prohibited. On receiving data in which the
multiprocessor bit is 1, this bit is automatically
cleared and normal reception is resumed. For
details, refer to section 13.6, Multiprocessor
Communication Function.
Transmit End Interrupt Enable
This bit is set to 1, TEI interrupt request is
enabled.
Clock Enable 0 and 1
Selects the clock source.
Asynchronous mode
00: Internal baud rate generator
01: Internal baud rate generator
Outputs a clock of the same frequency as the bit
rate from the SCK3 pin.
10: External clock
Inputs a clock with a frequency 16 times the bit
rate from the SCK3 pin.
11:Reserved
Clocked synchronous mode
00: Internal clock (SCK3 pin functions as clock
output)
01:Reserved
10: External clock (SCK3 pin functions as clock
input)
11:Reserved
Rev. 1.0, 03/01, page 159 of 280