Hitachi H8/3672 Series Hardware Manual page 48

Single-chip microcomputer
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Table 2-8 System Control Instructions
Instruction
Size*
TRAPA
RTE
SLEEP
LDC
B/W
STC
B/W
ANDC
B
ORC
B
XORC
B
NOP
Note: * Refers to the operand size.
B: Byte
W: Word
Rev. 1.0, 03/01, page
Function
Starts trap-instruction exception handling.
Returns from an exception-handling routine.
Causes a transition to a power-down state.
(EAs) → CCR
Moves the source operand contents to the CCR. The CCR size is one
byte, but in transfer from memory, data is read by word access.
CCR → (EAd), EXR → (EAd)
Transfers the CCR contents to a destination location. The condition code
register size is one byte, but in transfer to memory, data is written by
word access.
CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR with immediate data.
CCR ∨ #IMM → CCR, EXR ∨ #IMM → EXR
Logically ORs the CCR with immediate data.
CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically XORs the CCR with immediate data.
PC + 2 → PC
Only increments the program counter.
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