Table of Contents
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1.1
Overview
• High-speed H8/300H central processing unit with an internal 16-bit architecture
Upward-compatible with H8/300 CPUs on an object level
Sixteen 16-bit general registers
62 basic instructions
• Various peripheral functions
Timer V (8-bit timer)
Timer W (16-bit timer)
Watchdog timer
SCI3 (Asynchronous or clocked synchronous serial communication interface)
10-bit A/D converter
• On-chip memory
ROM
Model
F-ZTAT Version
HD64F3672
HD64F3670
• General I/O ports
• I/O pins: 26 I/O pins, including 5 large current ports (I
• Input-only pins: 4 input pins (also used for analog input)
• Supports various power-down states
• Compact package
Package
LQFP-64
LQFP-48
Section 1 Overview
ROM
16k
8k
(Code)
(FP-64E)
(FP-48F)
RAM
2,048 bytes
2,048 bytes
= 20mA, @V
OL
Body Size
×
10.0
10.0 mm
×
10.0
10.0 mm
Rev. 1.0, 03/01, page
= 1.5V)
OL
Pin Pitch
0.5 mm
0.65 mm
1
280
of
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