Table 6-2 Transition Mode after the SLEEP Instruction Execution and Interrupt Handling
DTON
SSBY
0
0
0
1
1
X
Legend:
X : Don't care.
•
When a state transition is performed while SMSEL is 1, timer V, SCI3, and the A/D converter
are reset, and all registers are set to their initial values. To use these functions after entering
active mode, reset the registers.
Table 6-3 Internal State in Each Operating Mode
Function
System clock oscillator
CPU
Instructions
operations
Registers
RAM
IO ports
External
IRQ3, IRQ0
interrupts
WKP5 to WKP0 Functioning
Peripheral
Timer V
functions
Timer W
Watchdog timer Functioning
SCI3
A/D converter
Rev. 1.0, 03/01, page 70 of 280
Transition Mode after SLEEP
SMSEL
Instruction Execution
0
Sleep mode
1
Sleep mode
X
Standby mode
0*
Active mode(direct transition)
Active Mode
Sleep Mode
Functioning
Functioning
Functioning
Halted
Functioning
Retained
Functioning
Retained
Functioning
Retained
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Transition Mode due to
Interrupt
Active mode
Active mode
Active mode
—
Subsleep Mode
Standby Mode
Halted
Halted
Halted
Halted
Retained
Retained
Retained
Retained
Retained
Register contents are
retained, but output is the
high-impedance state.
Functioning
Functioning
Functioning
Functioning
Reset
Reset
Retained(if internal clock φ
Retained
is selected as a count
clock, the counter is
incremented by a subclock)
Retained
Retained(functioning if the
internal oscillator is
selected as a count clock)
Reset
Reset
Reset