HP 16554A Programmer's Manual page 75

State/timing logic analyzers
Table of Contents

Advertisement

Table 5-1
SFORmat Subsystem Parameter Values
Parameter
<N>
label_name
polarity
clock_bits
upper_bits
lower_bits
clock_id
clock_spec
clock_pair_id
qual_operation
qual_num
qual_level
pod_num
set_hold_value
value
Value
an integer from 1 to 12
string of up to 6 alphanumeric characters
{POSitive | NEGative}
format (integer from 0 to 65535) for a clock (clocks are assigned
in decreasing order)
format (integer from 0 to 65535) for a pod (pods are assigned in
decreasing order)
format (integer from 0 to 65535) for a pod (pods are assigned in
decreasing order)
{J | K | L | M}
{OFF | RISing | FALLing | BOTH}
{1 | 2}
{AND|OR}
{1 | 2 | 3 | 4}
{OFF | LOW | HIGH}
an integer from 1 to 12
{0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9}
voltage (real number) -6.00 to +6.00
SFORmat Subsystem
5–5

Advertisement

Table of Contents
loading

This manual is also suitable for:

16555d16555a

Table of Contents