HP 16554A Programmer's Manual page 181

State/timing logic analyzers
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<term3a>
{ A | NOTA }
<term3b>
{ B | NOTB }
<term3c>
{ C | NOTC }
<term3d>
{ D | NOTD }
<term3e>
{ E | NOTE }
<term3f>
{ F | NOTF }
<term3g>
{ G | NOTG }
<term3i>
{ I | NOTI }
<range3a>
{ IN_RANGE1 | OUT_RANGE1 }
<range3b>
{ IN_RANGE2 | OUT_RANGE2 }
<edge3a>
{EDGE1 | NOT EDGE1}
<edge3b>
{EDGE2 | NOT EDGE2}
<timer3a>
{ TIMER1< | TIMER1>}
<timer3b>
{ TIMER2< | TIMER2>}
* = is optional such that it can be used zero or more times
+ = must be used at least once and can be repeated
TTRigger (TTRace) Subsystem
Qualifier
12–7

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